This theory of working is based on SAM7 AIC behaviour, read from AT91SAM7S Series Preliminary. AIC is an 8-level priority, maskable, vectored interrupt controller. It provides up to 32 interrupt sources. AIC drives IRQ and FIQ inputs of an ARM core. AIC inputs are driven from internal peripherals and external interrupts (e.g. IO). AIC behaviour may vary, Atmel SAM7 AIC is continuously clocked, therefore it does need to be powered up. On LPC family it is called VIC (Vectored Interrupt Controller). FIQ always is an interrupt with the highest priority and has source 0.
The moment the IRQ line to AIC is asserted the priority controller determines which interrupt should run. In the case when few interrupts with the same priority assert IRQ line the interrupt with the lowest source number is serviced first. If during interrupt service another interrupt is signaled to AIC, it is serviced only if it has higher priority than the currently pending one. If it has lower priority it is delayed until the pending interrupt is finished.
Example AIC configuration on AT91SAM7S64 for PWM (See full AIC PWM config.):

To enable interrupt clear an I bit in CPSR register (Current Program Status Register). When I bit is set, it disables IRQs. To clear I bit (which is bit 7 in CPSR), read CPSR, make a logic and operation with 0x7F, and write it back to CPSR:

Remember, that ARM must be in privileged mode to be able to operate on CPSR. This can be done like this:

To disable interrupt set an I bit in CPSR register (Current Program Status Register). To set I bit (which is bit 7 in CPSR), read CPSR, make a logic or with 0x80, and write it back to CPSR.

First an JTAG connection using OpenOCD has to be established. Open console and type:

If in current dictionary openocd.conf file is not found then OpenOCD will use the one from installation dictionnary. Next, open another session (we will call it JTAG session) in terminal and type (assuming port 4444):

Now its time to open a GDB connection. First halt ARM using halt command in JTAG session:

If arm-elf-gdb is unknown then add it's installation folder to your $PATH. When opening GDB connection you have to specify a file with a symbol table e.g. ELF file. This is done by '-g' option in GCC compiler (add this option in your Makefile).

Breakpoints
To set a breakpoint just use break or b command:

This will set a breakpoint in main.c file in line 44. To run the target just type:

If you get an information that breakpoint can not be pleased because the memory in not read/write then you need to set a hard breakpoint. Go to your JTAG session and type:

To delete breakpoints just type:

For CPU dump:

In order to have PWM working following steps must me taken:

Enable interrupts
This can be done by clearing an I bit in CPSR register (Current Program Status Register). I bit disables IRQ interrupts when it is set. To clear I bit (which is bit 7), read CPSR, make a logic and operation of 0x7F with read value from the register. Next, write it back to CPSR.

ARM must be in privileged mode to be able to operate on CPSR. Listing above is a macro used in C, also it could be defined as an inline function.

Configure PIO (Parallel Input/Output) Controller
Pin that will be used as a PWM (Pulse Width Modulation) output must be disabled. Next, peripheral function A has to be set:

Power up PWM Controller
PMC (Power Management Controller) has to know to power up PWM Controller. This is done by setting Peripheral ID bit in PCER (Peripheral Clock Enable Register). In AT91SAM7S64 PWM Controller has a Peripheral ID number 10.

Configure AIC (Advanced Interrupt Controller)
Interrupt source has to be selected (in following example source 10 is chosen). In AT91SAM7S64 up to 32 sources are available: FIQ (PID0), SYS (PID1), and PID2 to PID31. However, before configuring anything, corresponding bit (10 in this case) has to be set in IDCR (Interrupt Disable Command Register).
Next, an address of an ISR has to be written to AIC SVR (Source Vector Register).
Third, a priority and source type has to be set. Choice of 7 levels of interrupts priorities is given (0 - the lowest, and 7 - the highest). Source type defines whether an interrupt is triggerd on a level or an edge.
Finally, interrupt corresponding bit has to be set in AIC ICCR (Interrupt Clear Command Register).
When all is done an interrupt can be enabled in AIC IECR (Interrupt Enable Command Register) by setting corresponding bit.

However, a macro is often available from port header file (e.g. from ATMEL).

Configure PWM Controller
Now it is a time to configure PWMC. First, before anything a PWM Channel has to be disabled by using PWMC DIS (Disable Register). Selecting DIVA, DIVB prescallers is made by using PWMC MR (Mode Register), however in this example they are not used.
Next, prescaller and polarisation has to be selected in PWMC CMR (Channel Mode Register). Because PWM uses 16 clock, period and duty cycle are 16 bit values set in PWMC CPRDR (Channel Period Register), and PWMC CDTYR (Channel Duty Cycle Register) respectively. When all is set the PWM Channel can be enabled in PWMC ENA (Enable Register), and interrupts from that channel can be enabled in PWMC IER (Interrupt Enable Register).

Interrupt handler
In this example handler does not do anything except writing to AIC EIOCR (End Of Interrupt Command Register) to let AIC know that interrupt has been serviced.

To run X11 automatically in Slackware 13.0 (and many other distros) you have to edit /etc/inittab file, which may look like this:

and change line

to

If sound in Slackware does not work type groups in console and check the output. Your user should be added in audio, devplug, power groups. If his not, then type

where oldgroup1/2 are groups your user already belongs to.

First download libFTDI, and unpack it in your working folder. Change directory to unpacked libFTDI directory and login as a root. Now issue following commands:

This is your libFTDI installed. Now download latest OpenOCD. Unpack it and change direcotry to where it was unpacked. Login as a root user and issue following commands:

This was an easy part. More tricky is to tell your system to use your JTAG. However, this may be done by creating udev entry for your debugger. Simply 'touch' a file in /etc/udev/rules.d/ named 45-ft2232.rules with following entry:

This works for usbScarab from KrisTech (which is not a new debugger). To sort our your idProduct, idVendor try as root: